FPGA setup and building
Revision as of 18:20, 20 January 2021 by Gmarchiori (talk | contribs) (Initial page, mostly a placeholder.)
This page contains instructions on how to setup, compile and use the FPGA bitstream required to run the Flow simulator when compiled with the fpgaSolver enabled (ILU0-BiCGSTAB accelerated solver).
PREREQUISITES
DOWNLOADING
BUILDING
USING THE BITSTREAM
REPORTING ISSUES
Issues specific to the FPGA bitstream compilation process can be reported in the git issue tracker at:
http://github.com/OPM/FPGA/issues