FPGA setup and building

This page contains instructions on how to setup, compile and use the FPGA bitstream required to run the Flow simulator when compiled with the fpgaSolver enabled (ILU0-BiCGSTAB accelerated solver).

PREREQUISITES

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DOWNLOADING

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BUILDING

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USING THE BITSTREAM

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REPORTING ISSUES

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Issues specific to the FPGA bitstream compilation process can be reported in the git issue tracker at:

   http://github.com/OPM/FPGA/issues